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sy58610u 3.2gbps p recision, lvpecl 2:1 mux with internal termination and fail safe input precision edge is a registered trademark of micrel, inc. micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1 (408) 944 - 0800 ? fax + 1 (408) 474 - 1 000 ? http://www.micrel.com august 2007 m9999 - 082907-c hbwhelp@micrel.com or (408) 955 - 1690 general description the sy58610u is a 2.5/3.3v, high - speed, fully differential lvpecl 2:1 mux capable of processing clock signals up to 2.5ghz and data patterns up to 3.2gbps. the sy58610u is optimized to provide a buffered output of the selected input w ith less than 10ps pp total jitter. the differential input includes micrel?s unique, 3 - pin input termination architecture that interfaces to lvpecl, lvds or cml differential signals, (ac - or dc - coupled) as small as 100mv (200mv pp ) without any level - shifting or termination resistor networks in the signal path. for ac - coupled input interface applications, an integrated reference voltage (v ref-ac ) is provided to bias the v t pin. the outputs are 800mv lvpecl, with extremely fast rise/fall times guaranteed to be less than 130ps. the sy58610u operates from a 2.5v 5% supply or 3.3v 10% supply and is guaranteed over the full industrial temperature range ( ? 40c to +85c). for applications that require cml or lvds outputs, consider micrel?s sy58609u and sy58611u, 2:1 mux with 400mv and 325mv output swings, respectively. the sy58610u is part of micrel?s high - speed, precision edge ? product line. datasheets and support documentation can be found on micrel?s web site at: www.micrel.c om . functional block diagram precision edge ? features ? precision 800mv lvpecl 2:1 mux ? guaranteed ac performance over temperature and voltage: ? dc- to > 3.2gbps throughput ? <370ps propagation delay (in - to - q) ? <130ps rise/fal l times ? fail safe input ? prevents outputs from oscillating when input is invalid ? unique, patented mux input isolation design minimizes adjacent channel crosstalk ? ultra - low jitter design ? <1ps rms cycle - to - cycle jitter ? <10ps pp total jitter ? <1ps rms random jitter ? <10ps pp deterministic jitter ? high - speed lvpecl outputs ? 2.5v 5% or 3.3v 10% power supply operation ? industrial temperature range: ? 40c to +85c ? available in 16 - pin (3mm x 3mm) qfn package applications ? all sonet clock distribution ? fibre channel clock and data distribution ? gigabit ethernet clock and data distribution ? backplane distribution. markets ? storage ? ate ? test and measurement ? enterprise networking equipment ? high - end servers
micrel, inc. sy58610u august 2007 2 m9999 - 082907-c hbwhelp@micrel.com or (408) 955 - 1690 ordering information (1) part number package type operating range package marking lead finish SY58610UMG qfn -16 industrial 610u with pb - free bar - line indicator nipdau pb - free SY58610UMGtr (2) qfn -16 industrial 610u with pb - free bar - line indicator nipdau pb - free notes: 1. contact factory for die availability. d ice are guaranteed at ta = 25c, dc electricals only. 2. tape and reel. pin configuration truth table 16 - pin qfn sel output 0 in0 selected 1 in1 selected pin description pin number pin name pin function 1, 4 vt0, vt1 input termination center - tap : each side of the differential input pair terminates to the vt pin. this pin provides a center - tap to a termination network for maximum interface flexibility. see ?input interface applications? subsection. 2, 3 vref - ac0, vref - ac1 reference voltage: thes e outputs bias to v cc ? 1.2v. they are used for ac - coupling inputs in and /in. connect vref - ac directly to the corresponding vt pin. bypass with 0.01f low esr capacitor to vcc. due to limited drive capability, the vref - ac pin is only intended to drive its r espective vt pin. maximum sink/source current is 0.5ma. see ?input interface applications? subsection. 5, 6 15, 16 in1, /in1 in0, /in0 differential inputs: these input pairs are the differential signal inputs to the device. inputs accept dc - coupled dif ferential signals as small as 100mv (200mv pp ). each pin of the pairs internally terminates with 50 to the corresponding vt pin. if the input swing falls below a certain threshold (typical 30mv), the fail safe input (fsi) feature will guarantee a stable o utput by latching the output to its last valid state. see ?input interface applications? subsection. 7 sel single - ended input: this single- ended ttl/cmos - compatible input selects the inputs to the multiplexer. note that this input is internally connected to a 25k ? pull - up resistor and will default to logic high state if left open. the input - switching threshold is v cc /2. 8, 13 vcc positive power supply: bypass with 0.1uf//0.01uf low esr capacitors as close to the v cc pins as possible. 9, 12 /q, q lvpecl differential output pair: differential buffered output copy of the selected input signal. the output swing is typically 800mv. unused output pair may be left floating with no impact on jitter. see ?lvpecl output termination? subsection. 10, 11 gnd, expose d pad ground. exposed pad must be connected to a ground plane that is the same potential as the ground pins. 14 nc no connect.
micrel, inc. sy58610u august 2007 3 m9999 - 082907-c hbwhelp@micrel.com or (408) 955 - 1690 absolute maximum ratings (1) supply voltage (v cc ) ............................... ? 0.5v to +4.0v input voltage (v in ) ....................................... ? 0.5v to v cc lvpecl output current(i out ) continuous ....................................................... 50ma surge ............................................................. 100ma current (v t ) source or sink on vt pin ............................. 100ma input current source or sink current on (in, /in) ................ 50ma current (v ref ) source or sink current on v ref - ac (4) .............. 0.5ma maximum operating junction temperature ......... 125c lead temperature (soldering, 20sec.) .................. 260c storage temperature (t s ) .................... ? 65c to +150c operating ratings (2) supply voltage (v in ) ........................ +2.375v to +3.60v ambient temperature (t a ) ................... ? 40c to +85c package thermal resistance (3) qfn still - air ( ja ) ............................................ 60c/w junction - to - board ( jb ) ......................... 33c/w dc electrical characteristics (5) t a = ? 40c to +85c, unless otherwise stated. symbol parameter condition min typ max units v cc power supply voltage range 2.375 3.0 2.5 3.3 2.625 3.6 v i cc power supply curr ent no load, max. v cc 40 50 ma r diff_in differential input resistance (in -to - /in) 90 100 110 ? v ih input high voltage (in, /in) in, /in, note 7 v cc - 1.6 v cc v v il input low voltage (in, /in) in, /in 0.2 v ih ? 0.1 v v in input voltage swing (in, /in) se e figure 3a, note 6 0.1 1.0 v v diff_in differential input voltage swing (|in - /in|) see figure 3b 0.2 v v in_fsi input voltage threshold that triggers fsi 30 100 mv v ref - ac ac reference voltage v cc - 1.3 v cc - 1.0 v v t_in voltage from input to v t 1.28 v notes: 1. permanent device damage may occur if absolute maximum ratings are exceeded. this is a stress rating only and functional oper ation is not implied at conditions other than those detailed in the operational sections of this data sheet. exp osure to absolute maximum ratings conditions for extended periods may affect device reliability. 2. the data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. package thermal resistance assumes exposed pad is solder ed (or equivalent) to the device's most negative potential on the pcb. jb and ja values are determined for a 4 - layer board in still - air number, unless otherwise stated. 4. due to the limited drive capability, use for input of the same package only. 5. the circuit is designed to meet the dc specifications shown in the above table after thermal equilibrium has been established. 6. v in (max) is specified when v t is floating. 7. v ih (min) not lower than 1.2v.
micrel, inc. sy58610u august 2007 4 m9999 - 082907-c hbwhelp@micrel.com or (408) 955 - 1690 lvpecl outputs dc electrical characteristics (7) v cc = +2.5v 5% or +3.3v 10%, r l = 50 ? to v cc - 2v; t a = ? 40c to +85c, unles s otherwise stated. symbol parameter condition min typ max units v oh output high voltage q0, /q0, q1, /q1 v cc - 1.145 v cc - 0.895 v v ol output low voltage q0, /q0, q1, /q1 v cc - 1.945 v cc - 1.695 v v out output voltage swing see figure 3a 550 800 950 mv v dif f_out differential output voltage swing see figure 3b 1100 1600 mv lvttl/cmos dc electrical characteristics (70) v cc = 2.5v 5% or 3.3v 10%; t a = ? 40c to + 85c, unless otherwise stated. symbol parameter condition min typ max units v ih input high volt age 2.0 v v il input low voltage 0.8 v i ih input high current -125 30 a i il input low current -300 a notes: 7. the circuit is designed to meet the dc specifications shown in the above table after thermal equilibrium has been established .
micrel, inc. sy58610u august 2007 5 m9999 - 082907-c hbwhelp@micrel.com or (408) 955 - 1690 ac electrical characteristics (8) v cc = +2.5v 5% or +3.3v 10%, r l = 50 ? to v cc - 2v; input t r /t f < 300ps, t a = ? 40c to +85c, unless otherwise stated. symbol parameter condition min typ max units f max maximum frequency nrz data 3.2 gbps v out > 400mv clock 2.5 3 ghz t pd propagation delay in -to - q v in : 100mv - 200mv 180 340 470 ps v in : >200mv 140 290 370 ps sel -to -q 150 450 ps t skew input -to - input skew note 9, 10 5 20 ps part -to - part skew note 11 150 ps t jitter data random jitter note 12 1 ps rms deterministic jitter note 13 10 ps pp clock cycle - to - cycle jitter note 14 1 ps rms total jitter note 15 10 ps pp t r, t f output rise/fall times (20% to 80%) at full output swing. 40 100 130 ps duty cycle differential i/o 47 53 % notes: 8. high - frequency ac - parameters are guaranteed by design and characterization. 9 input - to - input skew is the time difference between the two inputs to one output, under identical input transitions. 10 input - to - input skew is included in in - to - q propagation delay. 11. part - to - part skew is defined for two parts with identical power supply voltages at the same temperature, same transition edge, and no skew at the edges at the respective inputs. 12. random jitter is measured wit h a k28.7 pattern, measured at f max . 13. deterministic jitter is measured at 2.5gbps with both k28.5 and 2 23 ? 1 prbs pattern. 14. cycle - to - cycle jitter definition: the variation period between adjacent cycles over a random sample of adjacent cycle pairs. t jitter _ cc = t n ? t n+1 , where t is the time between rising edges of the output signal. 15. total jitter definition: with an ideal clock input frequency of f max (device), no more than one output edge in 10^12 output edges will deviate by more than the spec ified peak - to - peak jitter value.
micrel, inc. sy58610u august 2007 6 m9999 - 082907-c hbwhelp@micrel.com or (408) 955 - 1690 functional description fail - safe input (fsi) the input includes a special fail - safe circuit to sense the amplitude of the input signal and to latch the outputs when there is no input signal present, or when the amplitud e of the input signal drops sufficiently below 100mv pk (200mv pp ), typically 30mv pk . maximum frequency of the sy58610u is limited by the fsi function. input clock failure case if the input clock fails to a floating, static, or extremely low signal swing, such that the voltage swing across the input pair is less than 100mv, the fsi function will eliminate a metastable condition and latch the outputs to the last valid state. no ringing and no undetermined state will occur at the output under these conditions . the output recovers to normal operation once the input signal returns to a valid state with a swing greater than 100mv. note that the fsi function will not prevent duty cycle distortion in case of a slowly deteriorating (but still toggling) input signal. due to the fsi function, the propagation delay will depend on rise and fall time of the input signal and on its amplitude. refer to ?typical operating characteristics? for detailed information. timing diagrams figure 1a. fail safe feature figure 1b. propagation delay in -to -q
micrel, inc. sy58610u august 2007 7 m9999 - 082907-c hbwhelp@micrel.com or (408) 955 - 1690 figure 1c. propagation delay sel -to - q
micrel, inc. sy58610u august 2007 8 m9999 - 082907-c hbwhelp@micrel.com or (408) 955 - 1690 typical characteristics v cc = 3.3v, gnd = 0v, v in = 100mv, r l = 50 ? to v cc - 2v, t a = 25c, unless otherwise stated.
micrel, inc. sy58610u august 2007 9 m9999 - 082907-c hbwhelp@micrel.com or (408) 955 - 1690 functional characteristics v cc = 3.3v, gnd = 0v, v in = 400mv, r l = 50 ? to v cc - 2v, t a = 25c, unless otherwise stated.
micrel, inc. sy58610u august 2007 10 m9999 - 082907-c hbwhelp@micrel.com or (408) 955 - 1690 functional characteristics (continued) v cc = 3.3v, gnd = 0v, v in = 400mv, r l = 50 ? to v cc - 2v, t a = 25c, unless otherwise stated.
micrel, inc. sy58610u august 2007 11 m9999 - 082907-c hbwhelp@micrel.com or (408) 955 - 1690 input and output stage figure 2a. simplified differential input buffer figure 2b. simplified lvpecl output buffer single- ended and differenti al swings figure 3a. single - ended voltage swing figure 3b. differential voltage swing
micrel, inc. sy58610u august 2007 12 m9999 - 082907-c hbwhelp@micrel.com or (408) 955 - 1690 input interface applications figure 4a. cml interface (dc - coupled) option: may connect v t to v cc figure 4b. cml interface (ac - coupled) figure 4c. lvpecl interface (dc - coupled) figure 4d. lvpecl interface (ac - coupled) figure 4e. lvds interface
micrel, inc. sy58610u august 2007 13 m9999 - 082907-c hbwhelp@micrel.com or (408) 955 - 1690 lvpecl output termination lvpecl output has very low output impedance (open emitter), and small signal swing which results in low emi. lvpecl is ide al for driving 50 ? and 100? - controlled impedance transmission lines. there are several techniques in terminating the lvpecl output, as shown in figures 5a and 5b. figure 5a. parallel termination - thevenin equivalent figure 5b. three - resistor ?y - term ination? related product and support documents part number function data sheet link sy58609u 4.25gbps precision, cml 2:1 mux with internal termination and fail safe input http://www.micrel.com/_pdf/hbw/sy5 8609u.pdf sy58611u 3.2gbps precision, lvds 2:1 mux with internal termination and fail safe input http://www.micrel.com/_pdf/hbw/sy58611u.pdf hbw solutions new products and termination application notes http://www.micrel.com/page.do?page=/product - info/as/ hbwsolutions.shtml
micrel, inc. sy58610u august 2007 14 m9999 - 082907-c hbwhelp@micrel.com or (408) 955 - 1690 package information 16- pin (3mm x 3mm) qfn micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel +1 (408) 944 - 0800 fax +1 (408) 474 - 1000 web http:/www.micrel.com the information furnished by micrel in this data sheet is believed to be accurate and reliable. however, no responsibility is assumed by micrel for its use. micrel reserves the right to change circuitry and specifications at any time without notification to the customer. micrel products are not designed or authorized for use as components in life support appliances, devices or systems where mal function of a product can reasonably be e xpected to result in personal injury. life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to res ult in a sig nificant injury to the user. a purchaser?s use or sale of micrel products for use in life support appliances, devices or systems is a purchaser?s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 20 06 micrel, incorporated.

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